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<div class="header">
  <div class="headertitle"><div class="title">powman.h</div></div>
</div><!--header-->
<div class="contents">
<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span> </div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="preprocessor">#ifndef _HARDWARE_STRUCTS_POWMAN_H</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="preprocessor">#define _HARDWARE_STRUCTS_POWMAN_H</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span> </div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="preprocessor">#include &quot;<a class="code" href="address__mapped_8h.html">hardware/address_mapped.h</a>&quot;</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="preprocessor">#include &quot;hardware/regs/powman.h&quot;</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span> </div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment">// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_powman</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment">//</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment">// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the &quot;Go to Definition&quot; feature)</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="comment">// _REG_(x) will link to the corresponding register in hardware/regs/powman.h.</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="comment">//</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="comment">// Bit-field descriptions are of the form:</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="comment">// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION</span></div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span> </div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"><a class="line" href="structpowman__hw__t.html">   26</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span>    _REG_(POWMAN_BADPASSWD_OFFSET) <span class="comment">// POWMAN_BADPASSWD</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span>    <span class="comment">// Indicates a bad password has been used</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span>    <span class="comment">// 0x00000001 [0]     BADPASSWD    (0) </span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span>    io_rw_32 badpasswd;</div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span> </div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span>    _REG_(POWMAN_VREG_CTRL_OFFSET) <span class="comment">// POWMAN_VREG_CTRL</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span>    <span class="comment">// Voltage Regulator Control</span></div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span>    <span class="comment">// 0x00008000 [15]    RST_N        (1) returns the regulator to its startup settings +</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span>    <span class="comment">// 0x00002000 [13]    UNLOCK       (0) unlocks the VREG control interface after power up +</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span>    <span class="comment">// 0x00001000 [12]    ISOLATE      (0) isolates the VREG control interface +</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span>    <span class="comment">// 0x00000100 [8]     DISABLE_VOLTAGE_LIMIT (0) 0=not disabled, 1=enabled</span></div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span>    <span class="comment">// 0x00000070 [6:4]   HT_TH        (0x5) high temperature protection threshold +</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span>    io_rw_32 vreg_ctrl;</div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span> </div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span>    _REG_(POWMAN_VREG_STS_OFFSET) <span class="comment">// POWMAN_VREG_STS</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span>    <span class="comment">// Voltage Regulator Status</span></div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span>    <span class="comment">// 0x00000010 [4]     VOUT_OK      (0) output regulation status +</span></div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span>    <span class="comment">// 0x00000001 [0]     STARTUP      (0) startup status +</span></div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno">   45</span>    io_ro_32 vreg_sts;</div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span> </div>
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno">   47</span>    _REG_(POWMAN_VREG_OFFSET) <span class="comment">// POWMAN_VREG</span></div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno">   48</span>    <span class="comment">// Voltage Regulator Settings</span></div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno">   49</span>    <span class="comment">// 0x00008000 [15]    UPDATE_IN_PROGRESS (0) regulator state is being updated +</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) output voltage select +</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span>    <span class="comment">// 0x00000002 [1]     HIZ          (0) high impedance mode select +</span></div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno">   52</span>    io_rw_32 vreg;</div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span> </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span>    _REG_(POWMAN_VREG_LP_ENTRY_OFFSET) <span class="comment">// POWMAN_VREG_LP_ENTRY</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span>    <span class="comment">// Voltage Regulator Low Power Entry Settings</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) output voltage select +</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span>    <span class="comment">// 0x00000004 [2]     MODE         (1) selects either normal (switching) mode or low power...</span></div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span>    <span class="comment">// 0x00000002 [1]     HIZ          (0) high impedance mode select +</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span>    io_rw_32 vreg_lp_entry;</div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span> </div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span>    _REG_(POWMAN_VREG_LP_EXIT_OFFSET) <span class="comment">// POWMAN_VREG_LP_EXIT</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span>    <span class="comment">// Voltage Regulator Low Power Exit Settings</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) output voltage select +</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span>    <span class="comment">// 0x00000004 [2]     MODE         (0) selects either normal (switching) mode or low power...</span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span>    <span class="comment">// 0x00000002 [1]     HIZ          (0) high impedance mode select +</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno">   66</span>    io_rw_32 vreg_lp_exit;</div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno">   67</span> </div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span>    _REG_(POWMAN_BOD_CTRL_OFFSET) <span class="comment">// POWMAN_BOD_CTRL</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span>    <span class="comment">// Brown-out Detection Control</span></div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span>    <span class="comment">// 0x00001000 [12]    ISOLATE      (0) isolates the brown-out detection control interface +</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span>    io_rw_32 bod_ctrl;</div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span> </div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span>    _REG_(POWMAN_BOD_OFFSET) <span class="comment">// POWMAN_BOD</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span>    <span class="comment">// Brown-out Detection Settings</span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) threshold select +</span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span>    <span class="comment">// 0x00000001 [0]     EN           (1) enable brown-out detection +</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span>    io_rw_32 bod;</div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span> </div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span>    _REG_(POWMAN_BOD_LP_ENTRY_OFFSET) <span class="comment">// POWMAN_BOD_LP_ENTRY</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span>    <span class="comment">// Brown-out Detection Low Power Entry Settings</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) threshold select +</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span>    <span class="comment">// 0x00000001 [0]     EN           (0) enable brown-out detection +</span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span>    io_rw_32 bod_lp_entry;</div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span> </div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span>    _REG_(POWMAN_BOD_LP_EXIT_OFFSET) <span class="comment">// POWMAN_BOD_LP_EXIT</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span>    <span class="comment">// Brown-out Detection Low Power Exit Settings</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span>    <span class="comment">// 0x000001f0 [8:4]   VSEL         (0x0b) threshold select +</span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span>    <span class="comment">// 0x00000001 [0]     EN           (1) enable brown-out detection +</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span>    io_rw_32 bod_lp_exit;</div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span> </div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span>    _REG_(POWMAN_LPOSC_OFFSET) <span class="comment">// POWMAN_LPOSC</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span>    <span class="comment">// Low power oscillator control register</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span>    <span class="comment">// 0x000003f0 [9:4]   TRIM         (0x20) Frequency trim - the trim step is typically 1% of the...</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span>    <span class="comment">// 0x00000003 [1:0]   MODE         (0x3) This feature has been removed</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span>    io_rw_32 lposc;</div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span> </div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span>    _REG_(POWMAN_CHIP_RESET_OFFSET) <span class="comment">// POWMAN_CHIP_RESET</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span>    <span class="comment">// Chip reset control and status</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span>    <span class="comment">// 0x10000000 [28]    HAD_WATCHDOG_RESET_RSM (0) Last reset was a watchdog timeout which was configured...</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span>    <span class="comment">// 0x08000000 [27]    HAD_HZD_SYS_RESET_REQ (0) Last reset was a system reset from the hazard debugger +</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span>    <span class="comment">// 0x04000000 [26]    HAD_GLITCH_DETECT (0) Last reset was due to a power supply glitch +</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span>    <span class="comment">// 0x02000000 [25]    HAD_SWCORE_PD (0) Last reset was a switched core powerdown +</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span>    <span class="comment">// 0x01000000 [24]    HAD_WATCHDOG_RESET_SWCORE (0) Last reset was a watchdog timeout which was configured...</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span>    <span class="comment">// 0x00800000 [23]    HAD_WATCHDOG_RESET_POWMAN (0) Last reset was a watchdog timeout which was configured...</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span>    <span class="comment">// 0x00400000 [22]    HAD_WATCHDOG_RESET_POWMAN_ASYNC (0) Last reset was a watchdog timeout which was configured...</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span>    <span class="comment">// 0x00200000 [21]    HAD_RESCUE   (0) Last reset was a rescue reset from the debugger +</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span>    <span class="comment">// 0x00080000 [19]    HAD_DP_RESET_REQ (0) Last reset was an reset request from the arm debugger +</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span>    <span class="comment">// 0x00040000 [18]    HAD_RUN_LOW  (0) Last reset was from the RUN pin +</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span>    <span class="comment">// 0x00020000 [17]    HAD_BOR      (0) Last reset was from the brown-out detection block +</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span>    <span class="comment">// 0x00010000 [16]    HAD_POR      (0) Last reset was from the power-on reset +</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span>    <span class="comment">// 0x00000010 [4]     RESCUE_FLAG  (0) This is set by a rescue reset from the RP-AP</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span>    <span class="comment">// 0x00000001 [0]     DOUBLE_TAP   (0) This flag is set by double-tapping RUN</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span>    io_rw_32 chip_reset;</div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span> </div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span>    _REG_(POWMAN_WDSEL_OFFSET) <span class="comment">// POWMAN_WDSEL</span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span>    <span class="comment">// Allows a watchdog reset to reset the internal state of powman in addition to the power-on state...</span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span>    <span class="comment">// 0x00001000 [12]    RESET_RSM    (0) If set to 1, a watchdog reset will run the full power-on...</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span>    <span class="comment">// 0x00000100 [8]     RESET_SWCORE (0) If set to 1, a watchdog reset will reset the switched...</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span>    <span class="comment">// 0x00000010 [4]     RESET_POWMAN (0) If set to 1, a watchdog reset will restore powman...</span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span>    <span class="comment">// 0x00000001 [0]     RESET_POWMAN_ASYNC (0) If set to 1, a watchdog reset will restore powman...</span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span>    io_rw_32 wdsel;</div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span> </div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span>    _REG_(POWMAN_SEQ_CFG_OFFSET) <span class="comment">// POWMAN_SEQ_CFG</span></div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span>    <span class="comment">// For configuration of the power sequencer +</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span>    <span class="comment">// 0x00100000 [20]    USING_FAST_POWCK (1) 0 indicates the POWMAN clock is running from the low...</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span>    <span class="comment">// 0x00020000 [17]    USING_BOD_LP (0) Indicates the brown-out detector (BOD) mode +</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span>    <span class="comment">// 0x00010000 [16]    USING_VREG_LP (0) Indicates the voltage regulator (VREG) mode +</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span>    <span class="comment">// 0x00001000 [12]    USE_FAST_POWCK (1) selects the reference clock (clk_ref) as the source of...</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span>    <span class="comment">// 0x00000100 [8]     RUN_LPOSC_IN_LP (1) Set to 0 to stop the low power osc when the...</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span>    <span class="comment">// 0x00000080 [7]     USE_BOD_HP   (1) Set to 0 to prevent automatic switching to bod high...</span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span>    <span class="comment">// 0x00000040 [6]     USE_BOD_LP   (1) Set to 0 to prevent automatic switching to bod low power...</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span>    <span class="comment">// 0x00000020 [5]     USE_VREG_HP  (1) Set to 0 to prevent automatic switching to vreg high...</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span>    <span class="comment">// 0x00000010 [4]     USE_VREG_LP  (1) Set to 0 to prevent automatic switching to vreg low...</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span>    <span class="comment">// 0x00000002 [1]     HW_PWRUP_SRAM0 (0) Specifies the power state of SRAM0 when powering up...</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span>    <span class="comment">// 0x00000001 [0]     HW_PWRUP_SRAM1 (0) Specifies the power state of SRAM1 when powering up...</span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span>    io_rw_32 seq_cfg;</div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span> </div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span>    _REG_(POWMAN_STATE_OFFSET) <span class="comment">// POWMAN_STATE</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span>    <span class="comment">// This register controls the power state of the 4 power domains</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span>    <span class="comment">// 0x00002000 [13]    CHANGING     (0) </span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span>    <span class="comment">// 0x00001000 [12]    WAITING      (0) </span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span>    <span class="comment">// 0x00000800 [11]    BAD_HW_REQ   (0) Bad hardware initiated state request</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span>    <span class="comment">// 0x00000400 [10]    BAD_SW_REQ   (0) Bad software initiated state request</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span>    <span class="comment">// 0x00000200 [9]     PWRUP_WHILE_WAITING (0) Request ignored because of a pending pwrup request</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span>    <span class="comment">// 0x00000100 [8]     REQ_IGNORED  (0) </span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span>    <span class="comment">// 0x000000f0 [7:4]   REQ          (0x0) </span></div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span>    <span class="comment">// 0x0000000f [3:0]   CURRENT      (0xf) </span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span>    io_rw_32 state;</div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span> </div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span>    _REG_(POWMAN_POW_FASTDIV_OFFSET) <span class="comment">// POWMAN_POW_FASTDIV</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span>    <span class="comment">// 0x000007ff [10:0]  POW_FASTDIV  (0x040) divides the POWMAN clock to provide a tick for the delay...</span></div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span>    io_rw_32 pow_fastdiv;</div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span> </div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span>    _REG_(POWMAN_POW_DELAY_OFFSET) <span class="comment">// POWMAN_POW_DELAY</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span>    <span class="comment">// power state machine delays</span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span>    <span class="comment">// 0x0000ff00 [15:8]  SRAM_STEP    (0x20) timing between the sram0 and sram1 power state machine steps +</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span>    <span class="comment">// 0x000000f0 [7:4]   XIP_STEP     (0x1) timing between the xip power state machine steps +</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span>    <span class="comment">// 0x0000000f [3:0]   SWCORE_STEP  (0x1) timing between the swcore power state machine steps +</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span>    io_rw_32 pow_delay;</div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span> </div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span>    <span class="comment">// (Description copied from array index 0 register POWMAN_EXT_CTRL0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span>    _REG_(POWMAN_EXT_CTRL0_OFFSET) <span class="comment">// POWMAN_EXT_CTRL0</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span>    <span class="comment">// Configures a gpio as a power mode aware control output</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span>    <span class="comment">// 0x00004000 [14]    LP_EXIT_STATE (0) output level when exiting the low power state</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span>    <span class="comment">// 0x00002000 [13]    LP_ENTRY_STATE (0) output level when entering the low power state</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span>    <span class="comment">// 0x00001000 [12]    INIT_STATE   (0) </span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span>    <span class="comment">// 0x00000100 [8]     INIT         (0) </span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span>    <span class="comment">// 0x0000003f [5:0]   GPIO_SELECT  (0x3f) selects from gpio 0-&gt;30 +</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span>    io_rw_32 ext_ctrl[2];</div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span> </div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span>    _REG_(POWMAN_EXT_TIME_REF_OFFSET) <span class="comment">// POWMAN_EXT_TIME_REF</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span>    <span class="comment">// Select a GPIO to use as a time reference, the source can be used to drive the low power clock at...</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span>    <span class="comment">// 0x00000010 [4]     DRIVE_LPCK   (0) Use the selected GPIO to drive the 32kHz low power...</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span>    <span class="comment">// 0x00000003 [1:0]   SOURCE_SEL   (0x0) 0 -&gt;  gpio12 +</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span>    io_rw_32 ext_time_ref;</div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span> </div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span>    _REG_(POWMAN_LPOSC_FREQ_KHZ_INT_OFFSET) <span class="comment">// POWMAN_LPOSC_FREQ_KHZ_INT</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span>    <span class="comment">// Informs the AON Timer of the integer component of the clock frequency when running off the LPOSC</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span>    <span class="comment">// 0x0000003f [5:0]   LPOSC_FREQ_KHZ_INT (0x20) Integer component of the LPOSC or GPIO clock source...</span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span>    io_rw_32 lposc_freq_khz_int;</div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span> </div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span>    _REG_(POWMAN_LPOSC_FREQ_KHZ_FRAC_OFFSET) <span class="comment">// POWMAN_LPOSC_FREQ_KHZ_FRAC</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span>    <span class="comment">// Informs the AON Timer of the fractional component of the clock frequency when running off the LPOSC</span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span>    <span class="comment">// 0x0000ffff [15:0]  LPOSC_FREQ_KHZ_FRAC (0xc49c) Fractional component of the LPOSC or GPIO clock source...</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span>    io_rw_32 lposc_freq_khz_frac;</div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span> </div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span>    _REG_(POWMAN_XOSC_FREQ_KHZ_INT_OFFSET) <span class="comment">// POWMAN_XOSC_FREQ_KHZ_INT</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span>    <span class="comment">// Informs the AON Timer of the integer component of the clock frequency when running off the XOSC</span></div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span>    <span class="comment">// 0x0000ffff [15:0]  XOSC_FREQ_KHZ_INT (0x2ee0) Integer component of the XOSC frequency in kHz</span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span>    io_rw_32 xosc_freq_khz_int;</div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span> </div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span>    _REG_(POWMAN_XOSC_FREQ_KHZ_FRAC_OFFSET) <span class="comment">// POWMAN_XOSC_FREQ_KHZ_FRAC</span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span>    <span class="comment">// Informs the AON Timer of the fractional component of the clock frequency when running off the XOSC</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span>    <span class="comment">// 0x0000ffff [15:0]  XOSC_FREQ_KHZ_FRAC (0x0000) Fractional component of the XOSC frequency in kHz</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span>    io_rw_32 xosc_freq_khz_frac;</div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span> </div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span>    _REG_(POWMAN_SET_TIME_63TO48_OFFSET) <span class="comment">// POWMAN_SET_TIME_63TO48</span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span>    <span class="comment">// 0x0000ffff [15:0]  SET_TIME_63TO48 (0x0000) For setting the time, do not use for reading the time,...</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span>    io_rw_32 set_time_63to48;</div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span> </div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span>    _REG_(POWMAN_SET_TIME_47TO32_OFFSET) <span class="comment">// POWMAN_SET_TIME_47TO32</span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span>    <span class="comment">// 0x0000ffff [15:0]  SET_TIME_47TO32 (0x0000) For setting the time, do not use for reading the time,...</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span>    io_rw_32 set_time_47to32;</div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span> </div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span>    _REG_(POWMAN_SET_TIME_31TO16_OFFSET) <span class="comment">// POWMAN_SET_TIME_31TO16</span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span>    <span class="comment">// 0x0000ffff [15:0]  SET_TIME_31TO16 (0x0000) For setting the time, do not use for reading the time,...</span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span>    io_rw_32 set_time_31to16;</div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno">  208</span> </div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span>    _REG_(POWMAN_SET_TIME_15TO0_OFFSET) <span class="comment">// POWMAN_SET_TIME_15TO0</span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span>    <span class="comment">// 0x0000ffff [15:0]  SET_TIME_15TO0 (0x0000) For setting the time, do not use for reading the time,...</span></div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span>    io_rw_32 set_time_15to0;</div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span> </div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span>    _REG_(POWMAN_READ_TIME_UPPER_OFFSET) <span class="comment">// POWMAN_READ_TIME_UPPER</span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span>    <span class="comment">// 0xffffffff [31:0]  READ_TIME_UPPER (0x00000000) For reading bits 63:32 of the timer</span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span>    io_ro_32 read_time_upper;</div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span> </div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno">  217</span>    _REG_(POWMAN_READ_TIME_LOWER_OFFSET) <span class="comment">// POWMAN_READ_TIME_LOWER</span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span>    <span class="comment">// 0xffffffff [31:0]  READ_TIME_LOWER (0x00000000) For reading bits 31:0 of the timer</span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno">  219</span>    io_ro_32 read_time_lower;</div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span> </div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span>    _REG_(POWMAN_ALARM_TIME_63TO48_OFFSET) <span class="comment">// POWMAN_ALARM_TIME_63TO48</span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span>    <span class="comment">// 0x0000ffff [15:0]  ALARM_TIME_63TO48 (0x0000) This field must only be written when POWMAN_ALARM_ENAB=0</span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span>    io_rw_32 alarm_time_63to48;</div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span> </div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span>    _REG_(POWMAN_ALARM_TIME_47TO32_OFFSET) <span class="comment">// POWMAN_ALARM_TIME_47TO32</span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno">  226</span>    <span class="comment">// 0x0000ffff [15:0]  ALARM_TIME_47TO32 (0x0000) This field must only be written when POWMAN_ALARM_ENAB=0</span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span>    io_rw_32 alarm_time_47to32;</div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span> </div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span>    _REG_(POWMAN_ALARM_TIME_31TO16_OFFSET) <span class="comment">// POWMAN_ALARM_TIME_31TO16</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>    <span class="comment">// 0x0000ffff [15:0]  ALARM_TIME_31TO16 (0x0000) This field must only be written when POWMAN_ALARM_ENAB=0</span></div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span>    io_rw_32 alarm_time_31to16;</div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span> </div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span>    _REG_(POWMAN_ALARM_TIME_15TO0_OFFSET) <span class="comment">// POWMAN_ALARM_TIME_15TO0</span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span>    <span class="comment">// 0x0000ffff [15:0]  ALARM_TIME_15TO0 (0x0000) This field must only be written when POWMAN_ALARM_ENAB=0</span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span>    io_rw_32 alarm_time_15to0;</div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span> </div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span>    _REG_(POWMAN_TIMER_OFFSET) <span class="comment">// POWMAN_TIMER</span></div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span>    <span class="comment">// 0x00080000 [19]    USING_GPIO_1HZ (0) Timer is synchronised to a 1hz gpio source</span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span>    <span class="comment">// 0x00040000 [18]    USING_GPIO_1KHZ (0) Timer is running from a 1khz gpio source</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span>    <span class="comment">// 0x00020000 [17]    USING_LPOSC  (0) Timer is running from lposc</span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span>    <span class="comment">// 0x00010000 [16]    USING_XOSC   (0) Timer is running from xosc</span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span>    <span class="comment">// 0x00002000 [13]    USE_GPIO_1HZ (0) Selects the gpio source as the reference for the sec counter</span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span>    <span class="comment">// 0x00000400 [10]    USE_GPIO_1KHZ (0) switch to gpio as the source of the 1kHz timer tick</span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span>    <span class="comment">// 0x00000200 [9]     USE_XOSC     (0) switch to xosc as the source of the 1kHz timer tick</span></div>
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno">  245</span>    <span class="comment">// 0x00000100 [8]     USE_LPOSC    (0) Switch to lposc as the source of the 1kHz timer tick</span></div>
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno">  246</span>    <span class="comment">// 0x00000040 [6]     ALARM        (0) Alarm has fired</span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span>    <span class="comment">// 0x00000020 [5]     PWRUP_ON_ALARM (0) Alarm wakes the chip from low power mode</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span>    <span class="comment">// 0x00000010 [4]     ALARM_ENAB   (0) Enables the alarm</span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span>    <span class="comment">// 0x00000004 [2]     CLEAR        (0) Clears the timer, does not disable the timer and does...</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>    <span class="comment">// 0x00000002 [1]     RUN          (0) Timer enable</span></div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span>    <span class="comment">// 0x00000001 [0]     NONSEC_WRITE (0) Control whether Non-secure software can write to the...</span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span>    io_rw_32 timer;</div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span> </div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span>    <span class="comment">// (Description copied from array index 0 register POWMAN_PWRUP0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span>    _REG_(POWMAN_PWRUP0_OFFSET) <span class="comment">// POWMAN_PWRUP0</span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span>    <span class="comment">// 4 GPIO powerup events can be configured to wake the chip up from a low power state</span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span>    <span class="comment">// 0x00000400 [10]    RAW_STATUS   (0) Value of selected gpio pin (only if enable == 1)</span></div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span>    <span class="comment">// 0x00000200 [9]     STATUS       (0) Status of gpio wakeup</span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span>    <span class="comment">// 0x00000100 [8]     MODE         (0) Edge or level detect</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span>    <span class="comment">// 0x00000080 [7]     DIRECTION    (0) </span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>    <span class="comment">// 0x00000040 [6]     ENABLE       (0) Set to 1 to enable the wakeup source</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span>    <span class="comment">// 0x0000003f [5:0]   SOURCE       (0x3f) </span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span>    io_rw_32 pwrup[4];</div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span> </div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span>    _REG_(POWMAN_CURRENT_PWRUP_REQ_OFFSET) <span class="comment">// POWMAN_CURRENT_PWRUP_REQ</span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span>    <span class="comment">// Indicates current powerup request state +</span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span>    <span class="comment">// 0x0000007f [6:0]   CURRENT_PWRUP_REQ (0x00) </span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span>    io_ro_32 current_pwrup_req;</div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span> </div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span>    _REG_(POWMAN_LAST_SWCORE_PWRUP_OFFSET) <span class="comment">// POWMAN_LAST_SWCORE_PWRUP</span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span>    <span class="comment">// Indicates which pwrup source triggered the last switched-core power up +</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span>    <span class="comment">// 0x0000007f [6:0]   LAST_SWCORE_PWRUP (0x00) </span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span>    io_ro_32 last_swcore_pwrup;</div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span> </div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span>    _REG_(POWMAN_DBG_PWRCFG_OFFSET) <span class="comment">// POWMAN_DBG_PWRCFG</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span>    <span class="comment">// 0x00000001 [0]     IGNORE       (0) Ignore pwrup req from debugger</span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span>    io_rw_32 dbg_pwrcfg;</div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span> </div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span>    _REG_(POWMAN_BOOTDIS_OFFSET) <span class="comment">// POWMAN_BOOTDIS</span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span>    <span class="comment">// Tell the bootrom to ignore the BOOT0</span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span>    <span class="comment">// 0x00000002 [1]     NEXT         (0) This flag always ORs writes into its current contents</span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span>    <span class="comment">// 0x00000001 [0]     NOW          (0) When powman resets the RSM, the current value of...</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span>    io_rw_32 bootdis;</div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span> </div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span>    _REG_(POWMAN_DBGCONFIG_OFFSET) <span class="comment">// POWMAN_DBGCONFIG</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span>    <span class="comment">// 0x0000000f [3:0]   DP_INSTID    (0x0) Configure DP instance ID for SWD multidrop selection</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span>    io_rw_32 dbgconfig;</div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span> </div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span>    <span class="comment">// (Description copied from array index 0 register POWMAN_SCRATCH0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span>    _REG_(POWMAN_SCRATCH0_OFFSET) <span class="comment">// POWMAN_SCRATCH0</span></div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span>    <span class="comment">// Scratch register</span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span>    <span class="comment">// 0xffffffff [31:0]  SCRATCH0     (0x00000000) </span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span>    io_rw_32 scratch[8];</div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span> </div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span>    <span class="comment">// (Description copied from array index 0 register POWMAN_BOOT0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span>    _REG_(POWMAN_BOOT0_OFFSET) <span class="comment">// POWMAN_BOOT0</span></div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span>    <span class="comment">// Scratch register</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span>    <span class="comment">// 0xffffffff [31:0]  BOOT0        (0x00000000) </span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span>    io_rw_32 boot[4];</div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span> </div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span>    _REG_(POWMAN_INTR_OFFSET) <span class="comment">// POWMAN_INTR</span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span>    <span class="comment">// Raw Interrupts</span></div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span>    <span class="comment">// 0x00000008 [3]     PWRUP_WHILE_WAITING (0) Source is state</span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span>    <span class="comment">// 0x00000004 [2]     STATE_REQ_IGNORED (0) Source is state</span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span>    <span class="comment">// 0x00000002 [1]     TIMER        (0) </span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span>    <span class="comment">// 0x00000001 [0]     VREG_OUTPUT_LOW (0) </span></div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span>    io_rw_32 intr;</div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span> </div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span>    _REG_(POWMAN_INTE_OFFSET) <span class="comment">// POWMAN_INTE</span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span>    <span class="comment">// Interrupt Enable</span></div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span>    <span class="comment">// 0x00000008 [3]     PWRUP_WHILE_WAITING (0) Source is state</span></div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span>    <span class="comment">// 0x00000004 [2]     STATE_REQ_IGNORED (0) Source is state</span></div>
<div class="line"><a id="l00313" name="l00313"></a><span class="lineno">  313</span>    <span class="comment">// 0x00000002 [1]     TIMER        (0) </span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span>    <span class="comment">// 0x00000001 [0]     VREG_OUTPUT_LOW (0) </span></div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span>    io_rw_32 inte;</div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span> </div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>    _REG_(POWMAN_INTF_OFFSET) <span class="comment">// POWMAN_INTF</span></div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>    <span class="comment">// Interrupt Force</span></div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>    <span class="comment">// 0x00000008 [3]     PWRUP_WHILE_WAITING (0) Source is state</span></div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span>    <span class="comment">// 0x00000004 [2]     STATE_REQ_IGNORED (0) Source is state</span></div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span>    <span class="comment">// 0x00000002 [1]     TIMER        (0) </span></div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span>    <span class="comment">// 0x00000001 [0]     VREG_OUTPUT_LOW (0) </span></div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span>    io_rw_32 intf;</div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span> </div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno">  325</span>    _REG_(POWMAN_INTS_OFFSET) <span class="comment">// POWMAN_INTS</span></div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span>    <span class="comment">// Interrupt status after masking &amp; forcing</span></div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span>    <span class="comment">// 0x00000008 [3]     PWRUP_WHILE_WAITING (0) Source is state</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span>    <span class="comment">// 0x00000004 [2]     STATE_REQ_IGNORED (0) Source is state</span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span>    <span class="comment">// 0x00000002 [1]     TIMER        (0) </span></div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span>    <span class="comment">// 0x00000001 [0]     VREG_OUTPUT_LOW (0) </span></div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span>    io_ro_32 ints;</div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span>} <a class="code hl_struct" href="structpowman__hw__t.html">powman_hw_t</a>;</div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span> </div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span><span class="preprocessor">#define powman_hw ((powman_hw_t *)POWMAN_BASE)</span></div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span><span class="keyword">static_assert</span>(<span class="keyword">sizeof</span> (<a class="code hl_struct" href="structpowman__hw__t.html">powman_hw_t</a>) == 0x00f0, <span class="stringliteral">&quot;&quot;</span>);</div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span> </div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span><span class="preprocessor">#endif </span><span class="comment">// _HARDWARE_STRUCTS_POWMAN_H</span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span> </div>
<div class="ttc" id="aaddress__mapped_8h_html"><div class="ttname"><a href="address__mapped_8h.html">address_mapped.h</a></div></div>
<div class="ttc" id="astructpowman__hw__t_html"><div class="ttname"><a href="structpowman__hw__t.html">powman_hw_t</a></div><div class="ttdef"><b>Definition:</b> powman.h:26</div></div>
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